Intelligence Without Exposure.
Accelerated on Silicon.
ZipLogic builds Umbra, the Encrypted Processing Unit hardware platform enabling frontier AI models and relational database systems to compute natively on ciphertext using fully homomorphic encryption (FHE).
By replacing server-side plaintext memory exposure with self-custodied hardware acceleration, ZipLogic allows global enterprises and sovereign states to execute high-consequence workloads while retaining exclusive ownership of their secret keys.
ZChat
Type a prompt. The server inherits ciphertext.
Trust-boundary demonstration in the browser. Production ZChat runs on Umbra silicon.
Your key domain
Plaintext stays with you.
Host memory
Awaiting prompt.
Returned answer
Encrypted until you decrypt.
Not a measured token rate. Platform · Request a live run
Use the data without opening it.
Disk and wire are already encrypted. The moment you run a query or a model, the files open in memory. Fully homomorphic encryption is the idea that they never have to. Umbra is the card that makes that idea fast enough for a rack.
A bank scores fraud without shipping customer files. A ministry answers a citizen without reading the prompt. A coalition correlates holdings without declassifying the source.
- Banks & insurersScore fraud, credit, or underwriting without shipping customer files to a third-party GPU cloud.
- Governments & public sectorAnswer citizen questions with AI while prompts, records, and outputs stay encrypted through execution.
- Defence & intelligenceRun coalition analytics and signals work without declassifying source holdings to share them.
- Utilities & operatorsDetect anomalies and plan capacity without exposing SCADA telemetry or setpoints to vendors.
- Automotive & fleetsTrain battery and safety models across OEMs without exposing driver data or proprietary designs.
The card
Umbra U100
A single accelerator for teams integrating into their own servers.
- Throughput
- 40M ops/s
- Interface
- PCIe ×8 Gen3
- Form
- Full-height, full-length, single-slot
- Power
- 25–75 W
9 granted
Patents
In progress
Independent cryptographic audit
By construction
Post-quantum posture
Customer-funded
Formal certification
Or take the finished node.
Eight cards in a configured 4U system, delivered ready to run. Same Umbra runtime. Anything built on the card runs unchanged on the node.
Umbra N8 · 320M ops/s estimated · 4U · ~1.4 kW
Breach the server and you inherit ciphertext.
Meaningless strings without a key that was never there.
The card is the first step.
Full schedule →Now: shipping
Umbra U100
Q4 2026
Umbra V-series
In development
Umbra OS
Leadership
Gen Chia
Chief Executive Officer
Founded ZipLogic to close the decryption gap for institutions that cannot expose data to use it. Previously built an all-female esports organisation in a category that did not yet exist: the same problem as encrypted compute hardware.
Lennise Ng
Chief Operating Officer
Y Combinator alumna (W20). Co-founded Borong (formerly Dropee), scaling B2B commerce and SME financing across ASEAN. Runs ZipLogic operations: deployment readiness, organisational execution, and evaluation through to installed systems.
David Zheng
VP of Encryption
Leads the cryptographic programme and is named inventor on nine granted Umbra patents. Architecture notes, documentation, and a second reader sit around the inventor: the research function is not a single-person dependency.
Jim Zheng
VP of Product
Owns the Umbra product surface: RainDB, ZChat, the SDK, and the roadmap from card to workload.
Deborah Gouineau
VP of Marketing
Decade-plus brand and marketing leadership (Warner Hotels, Three UK). Positions ZipLogic for institutional buyers, not consumer noise.
Hazman Hassan
VP of Business Development
Builds institutional partnerships and commercial programmes across Southeast Asia: architect by training, operator by practice.
Own the capability. Hold the only key.
Request a technical briefing or the specification pack. We respond within two business days.
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Methodology
1 Encrypted logic operations per second, measured on production silicon. Node figures estimated from measured single-card throughput.
2 End-to-end system overhead against equivalent native computation. Operation-level acceleration against lattice FHE is reported separately.